As devices for the semiconductor industry have become smaller and more closely packed together, processes to make such devices must be developed. In order to make devices such as DRAMS, high aspect ratio, straight walled trenches need to be made in silicon which are then filled with one or more dielectric layers to form capacitors. The trenches must be completely filled without voids.
In order to make 256 MB devices, openings in silicon must be etched that have a diameter on the order of 0.25-0.3 micron that are at least 8 microns deep. Conventional etchant compositions such as HBr and oxygen can form such devices, but there are limitations in the use of this etchant composition. As etching continues, the etch rate decreases. Further, while this etchant composition deposits a passivation layer on the sidewalls of the trench, the passivation layer also deposits on the top of the substrate, and on the process chamber walls and fixtures. As conditions such as temperature in the chamber change, these deposits flake off, forming particles in the chamber. Since particles are highly undesirable because they can fall onto the substrates being processed in the chamber, the chamber must be cleaned often, generally after each substrate is processed. The need for such frequent cleaning reduces the throughput of single substrate processing, and adds to the cost of making these semiconductor devices.
Various halogen-containing etchants for silicon-containing materials are known, but all of them have various characteristics that make them inadequate as etchants for making small diameter, deep openings having straight walls in silicon. Some etchants etch isotropically rather than anisotropically; some etchants deposit polymer-containing materials on the sidewalls of the trench, preventing smooth filling of the trench; some produce bowed or shaped sidewalls that cannot be filled properly; some of them have low etch rates; and some of them require high chamber power that causes damage to or contamination of the substrate. Microloading is also a problem. Various combinations of etchants have also been tried, but all of them are inadequate in terms of obtaining etchants that are highly selective with respect to a patterned mask, that will etch high aspect ratio, straight walled openings that have rounded bottoms in silicon, and that will etch silicon-containing material at high etch rates with minimal microloading.
A conventional etchant composition for silicon comprises hydrogen bromide (HBr) and oxygen (O.sub.2). This etchant composition produces a passivation layer on the trench sidewalls, and thus forms somewhat tapered trenches. The addition of a small amount of a fluorine-containing gas removes the passivation layer from the bottom of the etched trench, permitting a deeper trench to be formed. However, the passivation material deposits onto the etch chamber and its parts as well, leading to particle contamination of the wafers and a requirement that the chamber must be frequently cleaned, generally between every wafer. Further, using this etchant composition, there is a comparatively low selectivity between the silicon to be etched and the silicon oxide hardmasks generally used, which leads to severe hardmask erosion during the etch. This etch process also requires a high density plasma and high power transmission to the chamber.
In prior application Ser. No. 08/867,229 filed Jun. 2, 1997, of which this application is a continuation-in-part, an improved etchant composition for silicon was discovered, comprising a fluorine-containing gas, such as silicon hexafluoride (SF.sub.6), HBr and O.sub.2.
This etch composition will etch silicon-containing materials, particularly polysilicon or crystalline silicon, at high etch rates of 0.8 to 3 microns per minute. This etchant composition is also anisotropic, and will produce high aspect ratio, straight walled openings in silicon that have rounded bottoms.
However, this etchant composition is not completely satisfactory when high aspect ratio openings in silicon are to be made.
Further, this etchant is not completely satisfactory when a bi-layer hardmask comprising silicon oxide over silicon nitride is used. FIG. 1A illustrates the problem. Using an etchant composition of HBr, O.sub.2 and SF.sub.6, it is apparent that the silicon nitride part of the mask erodes during the etch, enlarging the diameter of the silicon nitride etched opening, and forming a step at the interface between the silicon oxide layer and the silicon nitride layer.
Still further, in order to properly fill very small diameter openings in silicon, the openings desirably are shaped so they are at least as wide at the bottom of the opening as at the top of the opening, while still maintaining a rounded bottom. Further, the opening desirably is substantially perpendicular with respect to the surface of the substrate.
Thus an etch process was sought that would provide smoothly tapered openings through one or more hardmask layers, would provide straight walled openings perpendicular to the silicon substrate surface, would be able to etch very small, e.g., less than 0.25 micron diameter openings in silicon having a high aspect ratio, that can provide variable sidewall taper and provide a clean process that avoids the need to clean the etch chamber between each substrate to be processed.